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Alexander G. Dean
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Biography
Dr. Dean's interests in embedded systems research include:
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Alexander G. Dean
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Dr. Dean's interests in embedded systems research include:
Dr. Dean received his BS EE from the University of Wisconsin in 1991 and then went to Carnegie Mellon in Pittsburgh for graduate studies with Dr. John Shen. He completed his MS ECE in 1993 after studying computer architecture and researching software-implemented control-flow error detection. After his MS he went to work at United Technologies Research Center, an industrial R&D lab in Connecticut, where he analyzed, simulated and designed communication networks and system architectures for jet engines, elevators, cars and building climate control systems. He also designed, programmed and built prototypes for several automotive applications. Supported by grants from UTRC, he resumed his PhD studies at CMU in 1997, introducing software thread integration for embedded systems. He applied this research at UTRC during periodic visits. In 2000 he received his PhD in ECE, and then joined the ECE faculty of NCSU. He has been an associate professor since 2006.
Dr. Dean teaches two courses on embedded system design, with the common theme of how to create software which uses microcontrollers efficiently without having to resort to assembly language. The courses emphasize compilers, performance evaluation, and real-time concurrent software systems, and feature hands-on lab projects. Students learn skills to efficiently design, program, debug, analyze and enhance sophisticated microcontroller-based embedded systems.
ECE
306 - Introduction to Embedded Systems - Fall 2002, Spring 2004, Fall
2004/5/6.
SplashFlash Outreach Poster
ECE 492D / 560 - Embedded System Design - Fall 2000, Spring/Fall 2001,Spring 2002, Fall 2003, Spring 2005/6
ECE 309 - Object-Oriented Programming for ECE - Spring 2008
ECE 406 - Design of Complex Digital Systems - Spring 2003
Research publications are stored here.
Memory Allocation with Real-Time SchedulingMany real-time (RT) embedded systems could benefit from a memory hierarchy to bridge the processor/memory speed gap. These RT embedded systems usually utilize a cacheless architecture to avoid the time variability which complicates the timing analysis essential for RT systems. In the absence of a cache the burden of allocating the data objects to the memory hierarchy is on the programmer or compiler.
We have developed a synergistic, optimal approach to allocating data objects and scheduling real-time tasks for embedded systems. We allocate data using integer linear programming (ILP) to minimize each task's worst-case execution time (WCET), then perform preemption threshold scheduling (PTS) on the tasks to reduce stack memory requirements while still meeting hard RT deadlines. The memory reduction of PTS allows these steps to be repeated. The data objects now require less memory, so more can fit into faster memory, further reducing WCET. The increased slack time can be used by PTS to reduce preemptions further, until a fixed point is reached.
RaPTEX: Rapid Prototyping of Embedded Communication
Systems Many embedded systems rely upon communication systems to exchange information and coordinate activities in spatially distributed applications. Developing communication systems which are quick, reliable, energy-efficient and error-free is a challenge due to the many trade-offs which must be made. Furthermore, software implementations are typically inefficient due to how they are written.
This project is developing new ways to develop and implement communication protocols for embedded networks using a building-block approach. A tool (RaPTEX) is being developed which offers a collection of commonly used protocol components which the developer tunes and interconnects as needed for the application. The tool then generates an efficient program from these components using various optimizations, including software thread integration. The tool also estimates protocol performance and computational requirements, allowing system designers to have quick feedback on the impact of design decisions.
Two specific applications are being investigated. The first application is ultrasonic marine biotelemetry, which enables the analysis of movement, physiological function and behavior of marine organisms. Dr. Tom Wolcott is a marine biologist with extensive experience in this area who is defining requirements and guiding testing. The second application is monitoring the structural health of bridges using wireless sensor networks. Dr. Mihail Sichitiu is collaborating with civil engineers on another project with similar goals, and is using sensor network protocol experience gained.
This project is funded by NSF CSR-EHS grant CNS-0509162.
LEES: Research in Optimizations and Benchmarking
for Low-End Embedded SystemsLow-end embedded systems can suffer from tight constraints in terms of cost, energy, memory, and computation power, yet still need to run multithreaded applications with real-time requirements. This research project investigates methods to improve performance in each of these areas while ensuring the resulting solution is practical regarding the other areas. Our initial work investigates whether it is practical and cost-effective to apply Dynamic Voltage and Frequency Scaling to low-end microcontrollers.
Embedded system designers need practical methods to predict application performance on different processors. This project is also working on developing abstraction methods to improve the portability of embedded code, enabling straightforward benchmarking across processors.
CASES 2005, CASES 2003, WSNA 2003
Object Code Obfuscation for Embedded SystemsLarge amounts of intellectual property are embodied in an embedded system's software, yet this object code can be extracted for analysis by competitors, reducing or eliminating competitive advantage. The goal of this project is to develop low-level program transformations which complicate the comprehension and hence reverse-engineering of object code. We focus on transformations which can easily and automatically be applied to generic, low-cost, off-the-shelf microcontrollers without incurring significant performance overhead.
Current Research Students: Greg Parsons, Karthik Sundaramoorthy, Shaolin Peng, Sang Yeol Kang, Subash Sachidananda
Past Research Students: Won So, Zane Purvis, Nagendra Kumar, Won So, Siddhartha Shivshankar, Shobhit Kanaujia, Ben Welch, Prasanth Ganesan, Ramnath Venugopalan, Vasanth Asokan, Rony Ghattas, Samir Govilkar, Sabina Grover, Shankar Ramachandran
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Software
Thread IntegrationThis research helps people efficiently design embedded systems using standard microprocessors more effectively.
Software thread integration is a compiler technology which gives cheap (commercial off-the-shelf) microprocessors near-concurrent thread execution, enabling them to emulate real-time hardware peripherals efficiently (through hardware-to-software migration). The thread integration is performed automatically, allowing system developers to program at a high level while benefiting from the timing precision of assembly language. This technology is also being developed to improve performance for high-end embedded systems.
Recent research involved applying STI to high-performance VLIW DSPs as well as low-end TinyOS-based sensor nodes in the TOSSTI project.
RTAS 2008, CASES 2006, TECS, CASES 2005-1, CASES 2005-2, IEEE-TC, TECS, LCTES 2005, WTR 2005, DATE 2005, IEEE Micro 2004, LCTES 2004, RTAS 2004, ODES 2004, CASES 2003, Circuit Cellar 2003, INTERACT 2003, RTSS 2002, INTERACT 2002, RTSS 1999, CASES 1999, RTSS 1998, EuroMicro 1998, OLTW 1997
This project is funded by a NSF CAREER Award and an NCSU FR&PD grant.
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The Cradle Universal MicroSystem is a scalable high-performance single-chip multiprocessor designed for streaming media processing applications. It features 20 RISC processors, 40 floating-point digital signal processors, 5 DMA engines, programmable I/O engines and can reach over 13 GFlops. This research examines architectural and coding techniques to optimize performance for high-performance embedded applications.
Research Assistant: Won So
Conference and Workshop Program Committees
Conference and Workshop Organization
