NEWS

Yan Solihin and Alexander Dean have been awarded $449,722 by the National Science Foundation for research on Efficient and Predictable Memory Hierarchy For High-Performance Embedded Systems. The award will run from September 1st, 2009 to August 31st, 2012.

The work will improve memory systems for high-performance real-time embedded systems. We will develop methods implemented in hardware and software to create fast, efficient memory systems with easily predicted performance.  This is critical to designers of systems with real-time requirements, as memory access time affects task execution time. A task's worst-case execution time (WCET) is the fundamental metric which is used in equations to determine how to make task scheduling decisions. For most non-trivial hardware and  software, computing the exact WCET is impossible. This leads designers to estimate a safe WCET bound which is guaranteed by design to never be smaller than the actual WCET. The closer the WCET bound is to the WCET, the more efficient the system can be, as there is less time dedicated to a margin of safety. Unfortunately, it is difficult to analyze the timing impact of caches and virtual memory systems on a task's WCET bound, much less WCET, resulting in overly conservative WCET bound estimates which may make the use of cache and virtual memory impractical. The goal of this proposal is to investigate methods to improve cache and virtual memory performance in a way that is easy to predict.